Samsung S5PC110 Manual page 669

S5PC110_UM
4.5.3.5 Nand Flash ECC Parity code for Page Program Register (NFECCPRGECC*, R, Address =
0xB0E2_0090 ~ 0xB0E2_00A8)
NFECCPRGECC0
4th Parity
3rd Parity
2nd Parity
1st Parity
NFECCPRGECC1
8th Parity
7th Parity
6th Parity
5th Parity
NFECCPRGECC2
12th Parity
11th Parity
10th Parity
9th Parity
NFECCPRGECC3
16th Parity
15th Parity
14th Parity
13th Parity
NFECCPRGECC4
20th Parity
19th Parity
18th Parity
17th Parity
NFECCPRGECC5
24th Parity
23rd Parity
22th Parity
21th Parity
NFECCPRGECC6
Reserved
26th Parity
25th Parity
NOTE: The NAND flash controller generate these ECC parity codes when write main area data while the MainECCLock
(NFCON[7]) bit is '0'(unlock).
Bit
[31:24] 4th Check Parity for page program from main area
[23:16] 3rd Check Parity for page program from main area
[15:8] 2nd Check Parity for page program from main area
[7:0] 1st Check Parity for page program from main area
Bit
[31:24] 8th Check Parity generated from main area
[23:16] 7th Check Parity generated from main area
[15:8] 6th Check Parity generated from main area
[7:0] 5th Check Parity generated from main area
Bit
[31:24] 12th Check Parity generated from main area
[23:16] 11th Check Parity generated from main area
[15:8] 10th Check Parity generated from main area
[7:0] 9th Check Parity generated from main area
Bit
[31:24] 16th Check Parity generated from main area
[23:16] 15th Check Parity generated from main area
[15:8] 14th Check Parity generated from main area
[7:0] 13th Check Parity generated from main area
Bit
[31:24] 20th Check Parity generated from main area
[23:16] 19th Check Parity generated from main area
[15:8] 18th Check Parity generated from main area
[7:0] 17th Check Parity generated from main area
Bit
[31:24] 24th Check Parity generated from main area
[23:16] 23rd Check Parity generated from main area
[15:8] 22th Check Parity generated from main area
[7:0] 21th Check Parity generated from main area
Bit
[31:16] Reserved
[15:8] 26th Check Parity generated from main area
[7:0] 25th Check Parity generated from main area
Description
Description
Description
Description
Description
Description
Description
4 NAND FLASH CONTROLLER
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Initial State
0x00
0x00
0x00
0x00
Initial State
-
0x00
0x00
4-28