Software Mode; Data Register Configuration - Samsung S5PC110 Manual

S5PC110_UM

4.3 SOFTWARE MODE

S5PC110 supports only software mode access. Use this mode to access NAND flash memory. The NAND flash
controller supports direct access to interface with the NAND flash memory.
•
Writing to the command register (NFCMMD) specifies the NAND Flash Memory command cycle
•
Writing to the address register (NFADDR) specifies the NAND Flash Memory address cycle
•
Writing to the data register (NFDATA) specifies write data to the NAND Flash Memory (write cycle)
•
Reading from the data register (NFDATA) specifies read data from the NAND Flash Memory (read cycle)
•
Reading main ECC registers (NFMECCD0/NFMECCD1) and Spare ECC registers (NFSECCD) specify read
data from the NAND Flash Memory
NOTE: In the software mode, use polling or interrupt to check the RnB status input pin.

4.3.1 DATA REGISTER CONFIGURATION

4.3.1.1 8-bit NAND Flash Memory Interface
•
A. Word Access
Register Endian
NFDATA
•
B. Half-word Access
Register Endian
NFDATA
•
C. Byte Access
Register Endian
NFDATA
Bit [31:24]
th
4 I/O[ 7:0]
Little
Bit [31:24]
Invalid value
Little
Bit [31:24]
Invalid value
Little
Bit [23:16] Bit [15:8]
rd nd
3 I/O[ 7:0] 2
Bit [23:16] Bit [15:8]
nd
Invalid value
2
Bit [23:16] Bit [15:8]
Invalid value Invalid value
4 NAND FLASH CONTROLLER
Bit [7:0]
1st
I/O[ 7:0] I/O[ 7:0]
Bit [7:0]
st
I/O[ 7:0] 1 I/O[ 7:0]
Bit [7:0]
st
1 I/O[ 7:0]
4-4