Power Management Register - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

4.10.4 POWER MANAGEMENT REGISTER

4.10.4.1 Power Management Register (PWR_CFG, R/W, Address = 0xE010_C000)
PWR_CFG
Reserved
CFG_STANDBYWFI
Reserved
4.10.4.2 Power Management Register (EINT_WAKEUP_MASK, R/W, Address = 0xE010_C004)
EINT_WAKEUP_MASK
EINT_WAKEUP_MASK
Bit
[31:10]
Reserved
[9:8]
Configure Cortex-A8 STANDBYWFI
Determines what action is taken when the STANDBYWFI
signal is activated by the Cortex-A8
00 = Ignore
01 = Enter IDLE mode
10 = Enter STOP mode
11 = Enter SLEEP mode
[7:0]
Reserved
Bit
[31:0]
External interrupt wake-up mask EINT[31:0] . The field
affects on NORMAL mode. Therefore, this field must clear
when EINT is used as a normal external interrupt source.
0 = Use as a wake-up source
1 = Disable
Description
Description
4 POWER MANAGEMENT
Initial State
0x00_0000
0x0
0x00
Initial State
0x0000_0000
4-42

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