Samsung S5PC110 Manual page 560

S5PC110_UM 1 DRAM CONTROLLER
Figure 1-9 Timing Diagram of Read Data Capture
(LPDDR/LPDDR2, non-zero delay, RL=3, rd_fetch=2)
If a delay exists as shown in 1-9, a bigger value should be assigned to rd_fetch
Figure
1-17