Samsung S5PC110 Manual page 245

Risc microprocessor
Table of Contents

Advertisement

S5PC110_UM
2.2.55.89 GPIO Interrupt Control Registers (GPA0_INT_PEND, R/W, Address = 0xE020_0A00)
GPA0_INT_PEND
Reserved
GPA0_INT_PEND[7]
GPA0_INT_PEND[6]
GPA0_INT_PEND[5]
GPA0_INT_PEND[4]
GPA0_INT_PEND[3]
GPA0_INT_PEND[2]
GPA0_INT_PEND[1]
GPA0_INT_PEND[0]
2.2.55.90 GPIO Interrupt Control Registers (GPA1_INT_PEND, R/W, Address = 0xE020_0A04)
GPA1_INT_PEND
Reserved
GPA1_INT_PEND[3]
GPA1_INT_PEND[2]
GPA1_INT_PEND[1]
GPA1_INT_PEND[0]
Bit
[31:8]
Reserved
[7]
0 = Not occur
1 = Occur interrupt
[6]
0 = Not occur
1 = Occur interrupt
[5]
0 = Not occur
1 = Occur interrupt
[4]
0 = Not occur
1 = Occur interrupt
[3]
0 = Not occur
1 = Occur interrupt
[2]
0 = Not occur
1 = Occur interrupt
[1]
0 = Not occur
1 = Occur interrupt
[0]
0 = Not occur
1 = Occur interrupt
Bit
[31:4]
Reserved
[3]
0 = Not occur
1 = Occur interrupt
[2]
0 = Not occur
1 = Occur interrupt
[1]
0 = Not occur
1 = Occur interrupt
[0]
0 = Not occur
1 = Occur interrupt
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
0
0
0
0
0
0
0
0
Initial State
0
0
0
0
0
2-210

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents