Ata_Mdma_Time Register Setting Example - Samsung S5PC110 Manual

S5PC110_UM

5.7.1 ATA_MDMA_TIME REGISTER SETTING EXAMPLE

The "td" minimum time is 215ns in the system clock 100MHz (10ns). It gives 21.5; "td" divided by 10ns. This case
has residual, assigning quotient (21) to the dma_td[3:0]. If it has no residual, assign the quotient minus 1 at
dma_td[3:0].
•
tMDMA0 (Timing Parameter of MDMA Mode 0)
•
tm: 50/10 = 5
•
td: 215/10 = 21.5
•
teoc: 265/10 = 26.5
Steps for ATAPI MDMA transfer protocol (To write and read transfer):
Steps to Write Protocol:
1. Wait for the driver to activate ATA_DMARQ.
2. Activate ATA_DMACKn, deactivate ATA_CS0n/CS1n, and set time to 0.
3. Activate ATA_DIOWn at time tM.
4. Drive 16-bit data on the lines at time tD.
5. Deactivate ATA_DIOWn after tD.
6. If ATA_DMARQ is still active, repeat step 3 to 6 for another word, and deactivate ATA_DMACKn at time tM.
Steps to Read Protocol:
1. Wait for the driver to activate ATA_DMARQ.
2. Activate ATA_DMACKn, deactivate ATA_CS0n/CS1n, and set time to 0.
3. Activate ATA_DIORn at time tM.
4. Deactivate ATA_DIORn and latch 16-bit data lines at time tD.
5. If ATA_DMARQ is still active, repeat step 3 to 5 for another word, and deactivate ATA_DMACKn at time tM.
dma_td value = 5 - 1 = 4
dma_td value = 21
dma_teoc value = 26
: 32'h000_1a_15_4
dma_tm[3 :0]
dma_td[11:4]
dma_teoc[19:12]
5 COMPACT FLASH CONTROLLER
: 0x4
: 0x15
: 0x1a
5-8