Samsung S5PC110 Manual page 693

S5PC110_UM
5.11.2.4 ATA Configuration Register (ATA_CFG, R/W, Address = 0xE820_0018)
ATA_CFG
Reserved
Reserved [30:13] Reserved
dma_mode
Reserved
word_swap
udma_auto_mode
Reserved
Reserved
byte_swap
atadev_irq_al
dma_dir
ata_class [3:2]
ata_iordy_en
ata_rst
Bit
[31] Reserved (This field should be 0x1)
[12] Determines whether DMA is normal DMA
0 = Normal DMA mode
1 = Reserved.
[11] Reserved
[10] Determines whether endian is little or big in AHB word
data. (half word swapping)
0 = Little endian {byte3, byte2, byte1, byte0}
1 = Big endian {byte1, byte0, byte3, byte2}
[9] Determines whether to continue automatically in case of
early termination in UDMA mode by Device. This bit shoud
not be changed during runtime operation.
0 = Stay in pause state and wait for CPU's action.
1 = Continue automatically
[8] Reserved
[7] Reserved
[6] Determines whether data endian is little or big in 16-bit
data.
0 = Little endian ( data[15:8], data[7:0] )
1 = Big endian ( data[7:0], data[15:8] )
In case of PIO mode;
0 = Big endian
1 = Little endian.
[5] Device interrupt signal level
0 = Active high
1 = Active low
[4] DMA transfer direction
0 = Host read data from device
1 = Host write data to device
Selects ATA transfer class
2'b00 = Transfer class is PIO
2'b01 = Transfer class is PIO DMA
2'b10 = Transfer class is Multi-word DMA
2'b11 = Transfer class is UDMA
[1] Determines whether IORDY input extends data transfer.
0 = Disables IORDY ( ignored )
1 = Enables IORDY ( can extend )
[0] ATAPI device reset by this host.
0 = No reset
1 = Reset
Description
5 COMPACT FLASH CONTROLLER
R/W Initial State
R/W
R
R/W
R
R/W
R/W
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0x1
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
5-21