I/O Description - Samsung S5PC110 Manual

S5PC110_UM

1.3 I/O DESCRIPTION

Signal
DDR2SEL
SCLK
nSCLK
RASn
CASn
WEn
DATA[31:0]
DQM[3:0]
DQSp[3:0]
DQSn[3:0]
ADCT[18:0], CKE
I/O
I Memory Type Selection
(0: LPDDR1, 1: DDR2, LPDDR2)
O Memory Clock
O Memory Negative Clock
O Row Address Selection
O Column Address Selection
O Write Enable
I/O Memory Data Bus
O Write Masking Per Byte
I/O Data Strobe Signal Per Byte
I/O Data Strobe Negative Signal Per Byte
O Memory Address, Bank Address, CS, CKE signals
Description
1 DRAM CONTROLLER
PAD
XDDR2SEL dedicated
Xm1SCLK dedicated
Xm1nSCLK dedicated
Xm1RASn dedicated
Xm1CASn dedicated
Xm1WEn dedicated
Xm1DATA[31:0] dedicated
Xm1DQM[3:0] dedicated
Xm1DQS[3:0] dedicated
Xm1DQSn[3:0] dedicated
* refer to 3.1 table dedicated
Type
1-19