Samsung S5PC110 Manual page 935

S5PC110_UM
HPRT Bit
PrtEnChng [3]
PrtEna [2]
PrtConn [1]
Det
PrtConnSts [0]
Port Enable/Disable Change
The core sets this bit if the status of the Port Enable bit [2] of
this register changes.
Port Enable
A port is enabled by the core after a reset sequence, and is
disabled by an overcurrent condition, a disconnect condition, or
by the application clearing this bit. The application cannot set
this bit by a register write. It clears it to disable the port. This bit
does not trigger any interrupt to the application.
1'b0: Port disabled
•
1'b1: Port enabled
•
Port Connect Detected
The core sets this bit if a device connection is detected to
trigger an interrupt to the application using the Host Port
Interrupt bit of the Core Interrupt register. The application must
write a 1 to this bit to clear the interrupt.
Port Connect Status
1'b0: No device is attached to the port
•
1'b1: A device is attached to the port
•
Description
5 USB2.0 HS OTG
R/W Initial State
R_SS_ 1'b0
WC
R_SS_ 1'b0
SC_
WC
R_SS_ 1'b0
WC
R 1'b0
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