True Ide Mode Pio/ Pdma Timing Diagram - Samsung S5PC110 Manual

S5PC110_UM 5 COMPACT FLASH CONTROLLER

5.5 TRUE IDE MODE PIO/ PDMA TIMING DIAGRAM

The PIO transfer protocol supports 8-bit register access in driver and 16-bit PIO data access. If PIO mode 3 or 4 is
the currently selected mode of operation, both hosts and devices support ATA_IORDY. The defines the
Figure 5-2
relationships between host and device interface signals for data and registers transfer.
5-3