Samsung S5PC110 Manual page 917

S5PC110_UM
GINTSTS Bit
USBSusp [11]
ErlySusp [10]
Reserved [9:8]
GOUTNak [7]
Eff
GINNakEff [6]
NPTxFEmp [5]
RxFLvl [4]
Sof [3]
USB Suspend
The core sets this bit to indicate that a suspend state was
detected on the USB. The core enters the Suspended state if
there is no activity on the line_state signal for an extended period
of time.
Early Suspend
The core sets this bit to indicate that an Idle state has been
detected on the USB for 3 ms.
-
Global OUT NAK Effective
Indicates that the Set Global OUT NAK bit in the Device Control
register (DCTL.SGOUTNak), set by the application, has taken
effect in the core. This bit can be cleared by writing the Clear
Global OUT NAK bit in the Device Control register
(DCTL.CGOUTNak).
Global IN Non-periodic NAK Effective
Indicates that the Set Global Non-periodic IN NAK bit in the
Device Control register (DCTL.SGNPInNak), set by the
application, has taken effect in the core. That is, the core has
sampled the Global IN NAK bit set by the application. This bit can
be cleared by clearing the Clear Global Non-periodic IN NAK bit
in the Device Control register (DCTL.CGNPInNak).
This interrupt does not necessarily mean that a NAK handshake
is sent out on the USB. The STALL bit takes precedence over the
NAK bit.
Non-periodic TxFIFO Empty
This interrupt is valid only when OTG_EN_DED_TX_FIFO = 0.
This interrupt is asserted when the Non-periodic TxFIFO is either
half or completely empty, and there is space for at least one entry
to be written to the Non-periodic Transmit Request Queue. The
half or completely empty status is determined by the Non-
periodic TxFIFO Empty Level bit in the Core AHB Configuration
register (GAHBCFG.NPTxFEmpLvl).
RxFIFO Non-Empty
Indicates that there is at least one packet pending to be read
from the RxFIFO.
Start of (micro) Frame
In Host mode, the core sets this bit to indicate that an SOF (FS),
micro-SOF (HS), or Keep-Alive (LS) is transmitted on the USB.
The application must write a 1 to this bit to clear the interrupt.
In Device mode, in the core sets this bit to indicate that an SOF
token has been received on the USB. The application can read
the Device Status register to get the current (micro) frame
number. This interrupt is seen only when the core is operating at
either HS or FS.
Description
5 USB2.0 HS OTG
R/W Initial State
R_SS 1'b0
_WC
R_SS 1'b0
_WC
- 2'b0
R 1'b0
R 1'b0
R 1'b1
R 1'b0
R_SS 1'b0
_WC
5-41