Samsung S5PC110 Manual page 174

Risc microprocessor
Table of Contents

Advertisement

S5PC110_UM
2.2.55.6 GPIO Interrupt Control Registers (GPD0_INT_CON, R/W, Address = 0xE020_0714)
GPD0_INT_CON
Reserved
Reserved
GPD0_INT_CON[3]
Reserved
GPD0_INT_CON[2]
Reserved
GPD0_INT_CON[1]
Reserved
GPD0_INT_CON[0]
Bit
[31:16]
Reserved
[15]
Reserved
[14:12]
Sets the signaling method of GPD0_INT[3]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[11]
Reserved
[10:8]
Sets the signaling method of GPD0_INT[2]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[7]
Reserved
[6:4]
Sets the signaling method of GPD0_INT[1]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[3]
Reserved
[2:0]
Sets the signaling method of GPD0_INT[0]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Initial State
0
0
000
0
000
0
000
0
000
2-139

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents