Samsung S5PC110 Manual page 947

S5PC110_UM
5.8.7.4 Device IN Endpoint Common Interrupt Mask Register (DIEPMSK, R/W, Address = 0xEC00_0810)
This register works with each of the Device IN Endpoint Interrupt registers for all endpoints to generate an
interrupt per IN endpoint. The IN endpoint interrupt for a specific status in the DIEPINTn register is masked by
writing to the corresponding bit in this register. Status bits are masked by default.
•
Mask interrupt: 1'b0
•
Unmask interrupt: 1'b1
DIEPMSK
Reserved
BNAInIntrMsk
TxfifoUndrnMsk
Reserved
INEPNakEffMsk
Reserved
INTknTXFEmpMsk
TimeOUTMsk
AHBErrMsk
EPDisbldMsk
XferComplMsk
Bit
[31:10] -
[9] BNA interrupt Mask
[8] Fifo Underrun Mask
[7] -
[6] IN Endpoint NAK Effective Mask
[5] -
[4] IN Token received with TxFIFO Empty mask
[3] Timeout Condition Mask
[2] AHB Error Mask
[1] Endpoint Disabled Interrupt Mask
[0] Transfer Completed Interrupt Mask
Description
5 USB2.0 HS OTG
R/W Initial State
- 22'h0
R/W 1'b0
R/W 1'b0
- 1'b0
R/W 1'b0
- 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
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