Samsung S5PC110 Manual page 827

S5PC110_UM
1.6.1.9 UART Transmit Buffer Register (Holding Register & FIFO Register)
•
UTXH0, W, Address = 0xE290_0020
•
UTXH1, W, Address = 0xE290_0420
•
UTXH2, W, Address = 0xE290_0820
•
UTXH3, W, Address = 0xE290_0C20
There are four UART transmit buffer registers in the UART block, namely, UTXH0, UTXH1, UTXH2 and UTXH3.
UTXHn contains 8-bit data for transmission data.
UTXHn
Reserved [31:8]
UTXHn [7:0]
1.6.1.10 UART Recive Buffer Register (Holding Register & FIFO Register)
•
URXH0, R, Address = 0xE290_0024
•
URXH1, R, Address = 0xE290_0424
•
URXH2, R, Address = 0xE290_0824
•
URXH3, R, Address = 0xE290_0C24
There are four UART receive buffer registers in the UART block, namely, URXH0, URXH1, URXH2 and URXH3.
URXHn contains 8-bit data for received data.
URXHn
Reserved [31:8]
URXHn [7:0]
NOTE: If an overrun error occurs, the URXHn must be read. If not, the next received data makes an overrun error, even
though the overrun bit of UERSTATn had been cleared.
Bit
Reserved
Transmit data for UARTn
Bit
Reserved
Receive data for UARTn
1 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
Description
Description
Initial State
-
-
Initial State
0
0x00
1-25