Samsung S5PC110 Manual page 204

Risc microprocessor
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S5PC110_UM
2.2.55.25 GPIO Interrupt Control Registers (GPA1_INT_FLTCON0, R/W, Address = 0xE020_0808)
GPA1_INT_FLTCON0
FLTEN2[3]
FLTWIDTH2[3]
FLTEN2[2]
FLTWIDTH2[2]
FLTEN2[1]
FLTWIDTH2[1]
FLTEN2[0]
FLTWIDTH2[0]
2.2.55.26 GPIO Interrupt Control Registers (GPA1_INT_FLTCON1, R/W, Address = 0xE020_080C)
GPA1_INT_FLTCON1
Reserved
Bit
[31]
Filter Enable for GPA1_INT[3]
0 = Disables
1 = Enables
[30:24]
Filtering width of GPA1_INT[3]
This value is valid when FLTSEL2is 1.
[23]
Filter Enable for GPA1_INT[2]
0 = Disables
1 = Enables
[22:16]
Filtering width of GPA1_INT[2]
This value is valid when FLTSEL2is 1.
[15]
Filter Enable for GPA1_INT[1]
0 = Disables
1 = Enables
[14:8]
Filtering width of GPA1_INT[1]
This value is valid when FLTSEL2is 1.
[7]
Filter Enable for GPA1_INT[0]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPA1_INT[0]
This value is valid when FLTSEL2is 1.
Bit
[31:0]
Reserved
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
0
0
0
0
0
0
0
Initial State
0
2-169

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