Samsung S5PC110 Manual page 346

S5PC110_UM
3.7.5.8 Clock Gating Control Register (CLK_GATE_IP5, R/W, Address = 0xE010_0484)
CLK_GATE_IP5
Reserved
CLK_JPEG
Reserved
Bit Description
[31:30] Should be one for all bit
[29] Gating all clocks for JPEG
(0: mask, 1: pass)
[28:0] Should be one for all bit
3 CLOCK CONTROLLER
Gated Clock Name
ACLK_JPEG
Initial State
0x3
1
0x1FFFFFFF
3-49