Samsung S5PC110 Manual page 370

S5PC110_UM
To enter the DEEP-IDLE mode,
1. Make sure all PLLs are running before entering low-power mode.
This can be done by checking APLL_CON0, MPLL_CON, EPLL_CON0, VPLL_CON register.
This step is required only when TOP_LOGIC field is set to 2'b01.
2. Set CFG_DIDLE field of IDLE_CFG to 2'b1.
3. Set other fields of IDLE_CFG based on the users' requirements.
4. Set CFG_STANDBYWFI field of PWR_CFG to 2'b01.
5. Set SYSCON_INT_DISABLE field of OTHERS to 1'b1
6. Execute Wait-For-Interrupt instruction (WFI). If SYSCON_INT_DISABLE field of OTHERS is still 1'b1 after
calling wfi instruction, this indicates wfi instruction is ignored by the processor
and user should call wfi instruction again.
The SYSCON performs the following sequence to enter DEEP-IDLE mode (TOP_LOGIC = 2'b01).
1. Complete all active bus transactions.
2. Complete all active memory controller transactions.
3. Allow external DRAM to enter self-refresh mode (to preserve DRAM contents).
4. Mask clock input using internal signal in SYSCON.
5. Disable all PLLs except for EPLL.
6. Selectively disable OSCs except 32.768 KHz.
To exit the DEEP-IDLE mode, wake up sources (For more information, refer to Section 4.6 ). Then SYSCON
performs the following sequence to exit from DEEP-IDLE mode (TOP_LOGIC = 2'b01).
1. Enable the OSC pads if disabled and wait for the OSC stabilization (around 1ms).
2. Unmask clock input to clock-on blocks.
3. Enable the PLLs and wait for locking (about 300us).
4. Let DRAMs exit from self-refresh mode.
4 POWER MANAGEMENT
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