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3.8.2 OneNAND Interface Register ......................................................................................................... 3-23
3.8.3 DMA Control Registers................................................................................................................... 3-30
3.8.4 Interrupt Controller Registers ......................................................................................................... 3-36
4
NAND Flash Controller ..............................................................................4-1
4.1 Overview of NAND Flash Controller ........................................................................................................ 4-1
4.2 Key Features of NAND Flash Controller.................................................................................................. 4-1
4.2.1 Block Diagram .................................................................................................................................. 4-2
4.2.2 NAND Flash Memory Timing............................................................................................................ 4-2
4.3 Software Mode ......................................................................................................................................... 4-4
4.3.1 Data Register Configuration ............................................................................................................. 4-4
4.3.2 1-/ 4-/ 8-/ 12-/ 16-bit ECC ................................................................................................................. 4-5
4.3.3 2048 Byte 1-bit ECC Parity Code Assignment Table ....................................................................... 4-6
4.3.4 32 Byte 1-bit ECC Parity Code Assignment Table ........................................................................... 4-6
4.3.5 1-bit ECC Module Features .............................................................................................................. 4-6
4.3.6 1-bit ECC Programming guide.......................................................................................................... 4-7
4.3.7 4-bit ECC Programming guide (ENCODING)................................................................................... 4-8
4.3.8 4-bit ECC Programming guide (DECODING)................................................................................... 4-9
4.3.9 8-bit / 12-bit / 16-Bit ECC Programming guide (ENCODING) ........................................................ 4-10
4.3.10 8/12/16-bit ECC Programming Guide (DECODING).................................................................... 4-11
4.3.11 ECC Parity Conversion Code Guide for 8/12/16-bit ECC ............................................................ 4-12
4.3.12 Lock scheme for data protection .................................................................................................. 4-13
4.4 i/O Description........................................................................................................................................ 4-14
4.5 Register Description............................................................................................................................... 4-15
4.5.1 Register Map .................................................................................................................................. 4-15
4.5.2 Nand Flash Interface and 1 / 4-bit ecc registers............................................................................. 4-17
4.5.3 ECC Registers for 8, 12 and 16-bit ecc.......................................................................................... 4-26
5
Compact Flash Controller .........................................................................5-1
5.1 Overview of Compact Flash Controller .................................................................................................... 5-1
5.2 Key Features of Compact Flash Controller.............................................................................................. 5-1
5.3 Block Diagram of Compact Flash Controller............................................................................................ 5-2
5.4 Functional Description ............................................................................................................................. 5-2
5.5 True IDE Mode PIO/ PDMA Timing Diagram .......................................................................................... 5-3
5.5.1 ATA_PIO_TIME Register Setting Example (In case of Data Transfer)............................................ 5-5
5.6 Flowchart for PIO Read / Write ................................................................................................................ 5-6
5.7 True IDE MDMA Mode Timing Diagram .................................................................................................. 5-7
5.7.1 ATA_MDMA_TIME Register Setting Example ................................................................................. 5-8
5.8 True IDE UDMA Mode Timing Diagram .................................................................................................. 5-9
5.8.1 ATA_UDMA_TIME Register Setting Example................................................................................ 5-12
5.9 Transfer State Abort............................................................................................................................... 5-13
5.10 I/O Description ..................................................................................................................................... 5-14
5.11 Register Description............................................................................................................................. 5-15
5.11.1 Register Map ................................................................................................................................ 5-15
5.11.2 ATA Command Register (ATA_COMMAND, R/W, Address = 0xE820_0008) ............................ 5-18
6
External Bus Interface ...............................................................................6-1
6.1 Overview of External bus Interface .......................................................................................................... 6-1
6.2 Key Features of S5PC110 EBI ................................................................................................................ 6-1
6.3 Block Diagram of Memory Interface through EBI .................................................................................... 6-2
6.4 Clock Scheme of Memory Controllers and EBI ....................................................................................... 6-3
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