S5PC110_UM
3.3 CLOCK RELATIONSHIP
Clocks have the following relationship:
•
MSYS clock domain
−
freq(ARMCLK)
−
freq(HCLK_MSYS)
−
freq(PCLK_MSYS)
−
freq(HCLK_IMEM)
•
DSYS clock domain
−
freq(PCLK_DSYS)
•
PSYS clock domain
−
freq(PCLK_PSYS)
−
freq(SCLK_ONENAND)
−
freq(SCLK_ONENANPSYS)
Values for the high-performance operation:
•
freq(ARMCLK)
•
freq(HCLK_MSYS)
•
freq(HCLK_IMEM)
•
freq(PCLK_MSYS)
•
freq(HCLKSECSS)
•
freq(HCLK_DSYS)
•
freq(PCLK_DSYS)
•
freq(HCLK_PSYS)
•
freq(PCLK_PSYS)
•
freq(SCLK_ONENAND)
= freq(APLLCLK) / n, where n = 1 ~ 8
= freq(ARMCLK) / n, where n = 1 ~ 8
= freq(HCLK_MSYS) / n, where n = 1 ~ 8
= freq(HCLK_MSYS) / 2
= freq(HCLK_DSYS) / n, where n = 1 ~ 8
= freq(HCLK_PSYS) / n, where n = 1 ~ 8
= freq(HCLK_PSYS) / n, where n = 1 ~ 8
= freq(SCLK_ONENAND) / 2
= 800 MHz
= 200 MHz
= 100 MHz
= 100 MHz
= 83 MHz
= 166 MHz
= 83 MHz
= 133 MHz
= 66 MHz
= 133 MHz, 166 MHz
3 CLOCK CONTROLLER
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