Samsung S5PC110 Manual page 916

S5PC110_UM
GINTSTS Bit
Incompl [20]
SOIN
OEPInt [19]
IEPInt [18]
Reserved [17:16] -
EOPF [15]
ISOutDrop [14]
EnumDone [13]
USBRst [12]
Incomplete Isochronous IN Transfer (incompISOIN)
The core sets this interrupt to indicate that there is at least one
isochronous IN endpoint on which the transfer is not completed in
the current microframe. This interrupt is asserted along with the
End of Periodic Frame Interrupt (EOPF) bit in this register.
Note: This interrupt is not asserted in Scatter/Gather DMA mode.
OUT Endpoints Interrupt (OEPInt)
The core sets this bit to indicate that an interrupt is pending on
one of the OUT endpoints of the core (in Device mode). The
application must read the Device All Endpoints Interrupt (DAINT)
register to determine the exact number of the OUT endpoint on
which the interrupt occurred, and then read the corresponding
Device OUT Endpoint-n Interrupt (DOEPINTn) register to
determine the exact cause of the interrupt. The application must
clear the appropriate status bit in the corresponding DOEPINTn
register to clear this bit.
IN Endpoints Interrupt (IEPInt)
The core sets this bit to indicate that an interrupt is pending on
one of the IN endpoints of the core (in Device mode). The
application must read the Device All Endpoints Interrupt (DAINT)
register to determine the exact number of the IN endpoint on
which the interrupt occurred, and then read the corresponding
Device IN Endpoint-n Interrupt (DIEPINTn) register to determine
the exact cause of the interrupt. The application must clear the
appropriate status bit in the corresponding DIEPINTn register to
clear this bit.
End of Periodic Frame Interrupt
Indicates that the period specified in the Periodic Frame Interval
field of the Device Configuration register (DCFG.PerFrInt) has
been reached in the current microframe.
Isochronous OUT Packet Dropped Interrupt
The core sets this bit if it fails to write an isochronous OUT
packet into the RxFIFO because the RxFIFO does not have
enough space to accommodate a maximum packet size packet
for the isochronous OUT endpoint.
Enumeration Done
The core sets this bit to indicate that speed enumeration is
complete. The application must read the Device Status (DSTS)
register to obtain the enumerated speed.
USB Reset
The core sets this bit to indicate that a reset is detected on the
USB.
Description
5 USB2.0 HS OTG
R/W Initial State
R_SS 1'b0
_WC
R 1'b0
R 1'b0
- 2'b0
R_SS 1'b0
_WC
R_SS 1'b0
_WC
R_SS 1'b0
_WC
R_SS 1'b0
_WC
5-40