Samsung S5PC110 Manual page 668

Risc microprocessor
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S5PC110_UM
4.5.3.3 Nand Flash ECC Status Register (NFECCSTAT, R/W, Address = 0xB0E2_0030)
NFECCSTAT
ECCBusy
Reserved
EncodeDone
DecodeDone
Reserved
FreePageStat
Reserved
4.5.3.4 Nand Flash ECC Sector Status Register (NFECCSECSTAT, R, Address = 0xB0E2_0040)
NFECCSECSTAT
ValdErrorStat
ECCErrorNo
Bit
[31]
Indicates the 8-bit ECC decoding engine is searching
whether a error exists or not
0 = Idle
1 = Busy
[30]
Reserved
[25]
When MLC ECC encoding is finished, this value set and
issue interrupt if EncodeDone is enabled. The NFMLCECC0
and NFMLCECC1 have valid values. To clear this, write '1'.
1 = MLC ECC encoding is completed
[24]
When MLC ECC decoding is finished, this value set and
issue interrupt if DecodeDone is enabled. The
NFMLCBITPT, NFMLCL0 and NFMLCEL1 have valid
values. To clear this, write '1'.
1 = MLC ECC decoding is completed
[23:9]
Reserved
[8]
It indicates whether the sector is free page or not.
[7:0]
Reserved
Bit
[31:8]
Each bit indicates which ERL and ERP is valid or not.
[4:0]
ECC decoding result when page read
00000 = No error
00001 = 1-bit error
00010 = 2-bit error
00011 = 3-bit error
....
01110 = 14-bit error
01111 = 15-bit error
10000 = 16-bit error
Note: If 8-bit ECC is used, the valid number of error is until
8. If the number exceeds the supported error number, it
means that uncorrectable error occurs.
Description
Description
4 NAND FLASH CONTROLLER
Initial State
0
1
0
0
0x0000
0
0x00
Initial State
0x0000_00
0x00
4-27

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