Samsung S5PC110 Manual page 725

S5PC110_UM
1.2.1.3 Configuration Register0 for DMA_PERI(0,1) (CR0, R)
• CR0 for DMA_PERI0, R, Address = 0xE090_0E00
• CR0 for DMA_PERI1, R, Address = 0xE0A0_0E00
CR0
num_events
num_periph_req
num_chnls
mgr_ns_at_rst
boot_en
periph_req
Bit
[21:17] Specifies the number of interrupt outputs that the DMAC
provides.
b11111 = 32 interrupt outputs, irq[31:0]
[16:12] Specifies the number of peripheral request interfaces that the
DMAC provides.
b11111 = 32 peripheral request interfaces
[6:4] Specifies the number of DMA channels that the DMAC
supports.
b111 = 8 DMA channels
[2] Indicates the status of the boot_manager_ns signal when the
DMAC exits from reset.
1 = boot_manager_ns was HIGH
[1] Indicates the status of the boot_from_pc signal when the
DMAC exits from reset.
0 = boot_from_pc was LOW
[0] Indicates the peripheral request interface.
1 = DMAC provides the number of peripheral request
interfaces that the num_periph_req field specifies.
Description
1 DMA CONTROLLER
Initial State
0x1F
0x1F
0x7
1
0
1
1-19