Samsung S5PC110 Manual page 521

S5PC110_UM
Register
VIC2VECTPRIORITY17
VIC2VECTPRIORITY18
VIC2VECTPRIORITY19
VIC2VECTPRIORITY20
VIC2VECTPRIORITY21
VIC2VECTPRIORITY22
VIC2VECTPRIORITY23
VIC2VECTPRIORITY24
VIC2VECTPRIORITY25
VIC2VECTPRIORITY26
VIC2VECTPRIORITY27
VIC2VECTPRIORITY28
VIC2VECTPRIORITY29
VIC2VECTPRIORITY30
VIC2VECTPRIORITY31
VIC2ADDRESS
VIC2PERIPHID0
VIC2PERIPHID1
VIC2PERIPHID2
VIC2PERIPHID3
VIC2PCELLID0
VIC2PCELLID1
VIC2PCELLID2
VIC2PCELLID3
VIC3IRQSTATUS
VIC3FIQSTATUS
VIC3RAWINTR
VIC3INTSELECT
VIC3INTENABLE
VIC3INTENCLEAR
Address R/W
0xF220_0244 R/W
0xF220_0248 R/W
0xF220_024C R/W
0xF220_0250 R/W
0xF220_0254 R/W
0xF220_0258 R/W
0xF220_025C R/W
0xF220_0260 R/W
0xF220_0264 R/W
0xF220_0268 R/W
0xF220_026C R/W
0xF220_0270 R/W
0xF220_0274 R/W
0xF220_0278 R/W
0xF220_027C R/W
0xF220_0F00 R/W
0xF220_0FE0 R
0xF220_0FE4 R
0xF220_0FE8 R
0xF220_0FEC R
0xF220_0FF0 R
0xF220_0FF4 R
0xF220_0FF8 R
0xF220_0FFC R
0xF230_0000 R
0xF230_0004 R
0xF230_0008 R
0xF230_000C R/W
0xF230_0010 R/W
0xF230_0014 W
1 VECTORED INTERRUPT CONTROLLER
Description
Specifies the Vector Priority 17 Register
Specifies the Vector Priority 18 Register
Specifies the Vector Priority 19 Register
Specifies the Vector Priority 20 Register
Specifies the Vector Priority 21 Register
Specifies the Vector Priority 22 Register
Specifies the Vector Priority 23 Register
Specifies the Vector Priority 24 Register
Specifies the Vector Priority 25 Register
Specifies the Vector Priority 26 Register
Specifies the Vector Priority 27 Register
Specifies the Vector Priority 28 Register
Specifies the Vector Priority 29 Register
Specifies the Vector Priority 30 Register
Specifies the Vector Priority 31 Register
Specifies the Vector Address Register
Specifies the Peripheral Identification
Register bit 7:0
Specifies the Peripheral Identification
Register bit 15:9
Specifies the Peripheral Identification
Register bit 23:16
Specifies the Peripheral Identification
Register bit 31:24
Specifies the PrimeCell Identification
Register bit 7:0
Specifies the PrimeCell Identification
Register bit 15:9
Specifies the PrimeCell Identification
Register bit 23:16
Specifies the PrimeCell Identification
Register bit 31:24
Specifies the IRQ Status Register
Specifies the FIQ Status Register
Specifies the Raw Interrupt Status
Register
Specifies the Interrupt Select Register
Specifies the Interrupt Enable Register
Specifies the Interrupt Enable Clear
Reset Value
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0x00000000
0x92
0x11
0x04
0x00
0x0D
0xF0
0x05
0xB1
0x00000000
0x00000000
-
0x00000000
0x00000000
-
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