Samsung S5PC110 Manual page 920

S5PC110_UM
GINTMSK
OTGIntMsk
ModeMisMsk
Reserved
5.8.3.8 Receive Status Debug Read/Status Read and Pop Registers (GRXSTSR/GRXSTSP)
A read to the Receive Status Debug Read register returns the contents of the top of the Receive FIFO. A read to
the Receive Status Read and Pop register additionally pops the top data entry out of the RxFIFO.
The receive status contents must be interpreted differently in Host and Device modes. The core ignores the
receive status pop/ read if the receive FIFO is empty and returns a value of 32'h0000_0000. The application must
only pop the Receive Status FIFO if the Receive FIFO Non-Empty bit of the Core Interrupt register
(GINTSTS.RxFLvl) is asserted.
Bit
[2] OTG Interrupt Mask
[1] Mode Mismatch Interrupt Mask
[0] -
Description
5 USB2.0 HS OTG
R/W Initial State
R/W 1'b0
R/W 1'b0
- 1'b0
5-44