Samsung S5PC110 Manual page 801

Risc microprocessor
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Figure 7-9
Timeout Setting Sequence ............................................................................................................. 7-11
Figure 7-10 Command Complete Sequence ..................................................................................................... 7-14
Figure 7-11 Transaction Control with Data Transfer Using DAT Line Sequence (Not using DMA ) ................. 7-16
Figure 7-12 Transaction Control with Data Transfer Using DAT Line Sequence (Using DMA) ........................ 7-18
Figure 7-13 Block Diagram of ADMA................................................................................................................. 7-22
Figure 7-14 Example of ADMA Data Transfer ................................................................................................... 7-23
Figure 7-15
32-bit Address Descriptor Table ................................................................................................... 7-24
Figure 7-16 State Diagram of the ADMA ........................................................................................................... 7-25
Figure 7-17 Card Detect State ........................................................................................................................... 7-51
Figure 7-18 Timing of Command Inhibit (DAT) and Command Inhibit (CMD) with Data Transfer .................... 7-51
Figure 7-19 Timing of Command Inhibit (DAT) for the Case of Response with Busy ....................................... 7-52
Figure 7-20 Timing of Command Inhibit (CMD) for the Case of No Response Command ............................... 7-52
Figure 8-1
Support TSI in the Broadcasting Mode............................................................................................. 8-2
Figure 8-2
TSI Block Diagram............................................................................................................................ 8-4
Figure 8-3
Transport Stream Packet Data Format............................................................................................. 8-6
Figure 8-4
Transport Stream Signals ................................................................................................................. 8-7
Figure 8-5
Sync Detection using TS_SYNC Signal ........................................................................................... 8-8
Figure 8-6
Sync Detection using Sync Byte (sync_det_cnt = 3)........................................................................ 8-9
Figure 8-7
TSI Error Cases (with SKIP mode, TS_VALID / TS_SYNC / TS_ERROR is active high) ............. 8-12
Figure 8-8
Block Diagram of TS_CLK Filter..................................................................................................... 8-13
Figure 8-9
TSI Control Finite State Machine (FSM)......................................................................................... 8-14

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