Samsung S5PC110 Manual page 952

S5PC110_UM
5.8.7.11 Device IN Endpoint FIFO Empty Interrupt Mask Register (DIEPEMPMSK, R/W, Address =
0xEC00_0834)
This register is used to control the IN endpoint FIFO empty interrupt generation (DIEPINTn.TxfEmp).
•
Mask interrupt: 1'b0
•
Unmask interrupt: 1'b1
DVBUSPULSE Bit
Reserved [31:16] -
InEpTxfEmpMsk [15:0]
5.8.7.12 Device Logical Endpoint-Specific Registers
A logical endpoint is unidirectional: it is either IN or OUT. To represent a bidirectional endpoint, two logical
endpoints are required, one for the IN direction and the other for the OUT direction. This is also true for control
endpoints. The registers and register fields described in this section may pertain to IN or OUT endpoints, or both,
or specific endpoint types are noted.
IN EP Tx FIFO Empty Interrupt Mask Bits
These bits acts as mask bits for DIEPINTn. TxFEmp
interrupt One bit per IN Endpoint: Bit 0 for IN EP 0, bit 15
for IN EP 15
Description
5 USB2.0 HS OTG
R/W Initial State
- 16'h0
R/W 16'h0
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