Samsung S5PC110 Manual page 631

S5PC110_UM
3.8.2.4 OneNAND Interface Status Register (ONENAND_IF_STATUS, R, Address = 0xB060_010C)
ONENAND_
Bit
IF_STATUS
- [31:24]
- [23:18]
INTD [17:16]
- [15:1]
ORWB [0]
Reserved
Reserved
OneNAND INT Done
This status is used to check whether the OneNAND command
execution is complete or not. Check whether the OneNAND INT pin's
rising edge has been occurred or not after issuing a command to the
OneNAND to notify command execution completion. This bit is set to
1 automatically when OneNAND INT pin's rising edge is detected
and is cleared to 0 when INTC (OneNAND INT Done Clear) bit of
OneNAND Interface Command Register (ONENAND_IF_CMD) is set
to 1.
INTD[0]
1b = Device[0] OneNAND Interrupt Done
0b = No operation
INTD[1]
1b = Device[1] OneNAND Interrupt Done
0b = No operation
Reserved
OneNAND Read Write Busy
This status is used to check whether the OneNAND interface is busy
or not to read or write data. This bit must be checked to confirm that
there is no (For example, posted writes or read prefetch operations)
bus transaction in progress on the OneNAND interface before writing
new configurations to ONENAND_IF_CTRL and
ONENAND_IF_ASYNC_TIMING_CTRL registers.
1b = Busy
0b = Not Busy
Description
3 ONENAND CONTROLLER
Initial State
-
111111b
11b
-
0b
3-29