Samsung S5PC110 Manual page 955

S5PC110_UM
5.8.7.14 Device Control OUT Endpoint 0 Control Register (DOEPCTL0, R/W, Address =0xEC00_0B00)
This section describes the Control OUT Endpoint 0 Control register. Nonzero control endpoints use registers for
endpoints 1-15.
DOEPCTL0 Bit
EPEna [31]
EPDis [30]
Reserved [29:28] -
SetNAK [27]
CNAK [26]
Reserved [25:22] -
Stall [21]
Snp [20]
EPType [19:18] Endpoint Type
Endpoint Enable
When Scatter/Gather DMA mode is enabled, for OUT
endpoints this bit indicates that the descriptor structure and
data buffer to receive data is setup.
When Scatter/Gather DMA mode is disabled—(such as for
•
buffer-pointer based DMA mode)—this bit indicates that the
application has allocated the memory to start receiving data
from the USB.
The core clears this bit before setting any of the following
interrupts on this endpoint:
SETUP Phase Done
•
Endpoint Disabled
•
Transfer Completed
•
Note: In DMA mode, this bit must be set for the core to
transfer SETUP data packets into memory.
Endpoint Disable
The application cannot disable control OUT endpoint 0.
Set NAK
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application controls the transmission of NAK
handshakes on an endpoint. The core sets this bit on a
Transfer Completed interrupt, or after a SETUP is received on
the endpoint.
Clear NAK
A write to this bit clears the NAK bit for the endpoint.
STALL Handshake
The application sets this bit, and the core clears it, if a SETUP
token is received for this endpoint. If a NAK bit or Global OUT
NAK is set along with this bit, the STALL bit takes priority.
Irrespective of this bit's setting, the core always responds to
SETUP data packets with an ACK handshake.
Snoop Mode
This bit configures the endpoint to Snoop mode. In Snoop
mode, the core does not check the correctness of OUT
packets before transferring them to application memory.
Hardcoded to 2'b00 for control.
Description
5 USB2.0 HS OTG
R/W Initial State
R_WS_ 1'b0
SC
R 1'b0
- 2'b0
W 1'b0
W 1'b0
- 4'h0
R_WS_ 1'b0
SC
R/W 1'b0
R 2'h0
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