Samsung S5PC110 Manual page 730

S5PC110_UM
1.2.1.14 Configuration Register DN for DMA_MEM (CRdn, R, Address = 0xFA20_0E14)
CRDn
data_buffer_dep
rd_q_dep
rd_cap
wr_q_dep
wr_cap
data_width
Bit
[29:20] Specifies the number of lines that the data buffer contains.
b000011111 = 32 lines
[19:16] Specifies the depth of read queue.
b0111 = 8 lines
[14:12] Specifies the read issuing capability that programs the number
of outstanding read transactions.
b011 = 4
[11:8] Specifies the depth of write queue.
b0111 =8 lines
[6:4] Specifies the write issuing capability that programs the number
of outstanding write transactions.
b011 = 4
[2:0] Specifies the data bus width of AXI interface.
b011 = 64-bit
Description
1 DMA CONTROLLER
Initial State
0x1F
0x7
0x3
0x7
0x3
0x3
1-24