Samsung S5PC110 Manual page 213

Risc microprocessor
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S5PC110_UM
2.2.55.39 GPIO Interrupt Control Registers (GPE1_INT_FLTCON0, R/W, Address = 0xE020_0840)
GPE1_INT_FLTCON0
FLTEN9[3]
FLTWIDTH9[3]
FLTEN9[2]
FLTWIDTH9[2]
FLTEN9[1]
FLTWIDTH9[1]
FLTEN9[0]
FLTWIDTH9[0]
2.2.55.40 GPIO Interrupt Control Registers (GPE1_INT_FLTCON1, R/W, Address = 0xE020_0844)
GPE1_INT_FLTCON1
Reserved
FLTEN9[4]
FLTWIDTH9[4]
Bit
[31]
Filter Enable for GPE1_INT[3]
0 = Disables
1 = Enables
[30:24]
Filtering width of GPE1_INT[3]
This value is valid when FLTSEL9 is 1.
[23]
Filter Enable for GPE1_INT[2]
0 = Disables
1 = Enables
[22:16]
Filtering width of GPE1_INT[2]
This value is valid when FLTSEL9 is 1.
[15]
Filter Enable for GPE1_INT[1]
0 = Disables
1 = Enables
[14:8]
Filtering width of GPE1_INT[1]
This value is valid when FLTSEL9 is 1.
[7]
Filter Enable for GPE1_INT[0]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPE1_INT[0]
This value is valid when FLTSEL9 is 1.
Bit
[31:8]
Reserved
[7]
Filter Enable for GPE1_INT[4]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPE1_INT[4]
This value is valid when FLTSEL9 is 1.
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
0
0
0
0
0
0
0
Initial State
0
0
0
2-178

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