S5PC110_UM
shows the OTG FIFO Address Mapping. The following registers must be programmed as follows;
Figure 5-3
In Host Mode
•
RXFSIZ[31:16] = OTG_RX_DFIFO_DEPTH
•
NPTXFSIZ[15:0] = OTG_RX_DFIFO_DEPTH
•
NPTXFSIZ[31:16] = OTG_TX_HNPERIO_DFIFO_DEPTH
•
HPTXFSIZ[15:0] = OTG_RX_DFIFO_DEPTH + OTG_TX_HNPERIO_DFIFO_DEPTH
•
HPTXFSIZ[31:16] = OTG_TX_HPERIO_DFIFO_DEPTH
In Device Mode
•
RXFSIZ[31:16 ] = OTG_RX _DFIFO_ DEPTH
•
NPTXFSIZ[15:0 ] = OTG_RX_ DFIFO_ DEPTH
•
NPTXFSIZ[31:16 ] = OTG_TX_DINEP_DFIFO_DEPTH_0
•
DIEPTXF_1[15:0] = OTG_RX_DFIFO_DEPTH + OTG_TX_DINEP_DFIFP_DEPTH_0
•
DIEPTXF_1[31:16] = OTG_TX_DINEP_DFIFO_DEPTH_1
•
DEIPTXF_2[15:0] = DIEPTXF_1[15:0] + OTG_TX_DINEP_DFIFO_DEPTH_1
•
DIEPTXF_2[31:16] = OTG_TX_DINEP_DFIFO_DEPTH_2
NOTE: When the device is operating in non Scatter Gather Internal DMA mode, the last locations of the SPRAM are used to
store the DMAADDR values of each Endpoint (1 Location per Endpoint). When the device is operating in Scatter
Gather, then the last locations of the SPRAM store the Base Descriptor address, Current Descriptor address, Current
Buffer address, and status word (DWORD-32bits information for each endpoint direction (4 locations per Endpoint .If
an endpoint is bidirectional then 4 will be used for IN and another 4 for OUT).
5 USB2.0 HS OTG
5-8