Samsung S5PC110 Manual page 283

Risc microprocessor
Table of Contents

Advertisement

S5PC110_UM
2.2.60.4 External Interrupt Control Registers (EXT_INT_3_CON, R/W, Address = 0xE020_0E0C)
EXT_INT_3_CON
Reserved
EXT_INT_3_CON[7]
Reserved
EXT_INT_3_CON[6]
Reserved
EXT_INT_3_CON[5]
Reserved
EXT_INT_3_CON[4]
Reserved
EXT_INT_3_CON[3]
Reserved
EXT_INT_3_CON[2]
Bit
[31]
Reserved
[30:28]
Sets the signaling method of EXT_INT[31]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[27]
Reserved
[26:24]
Sets the signaling method of EXT_INT[30]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[23]
Reserved
[22:20]
Sets the signaling method of EXT_INT[29]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[19]
Reserved
[18:16]
Sets the signaling method of EXT_INT[28]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[15]
Reserved
[14:12]
Sets the signaling method of EXT_INT[27]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
100 = Both edge triggered
101 ~ 111 = Reserved
[11]
Reserved
[10:8]
Sets the signaling method of EXT_INT[26]
000 = Low level
001 = High level
010 = Falling edge triggered
011 = Rising edge triggered
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Initial State
0
000
0
000
0
000
0
000
0
000
0
000
2-248

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents