Figure 6-1 Block Diagram Of Booting Time Operation - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM
shows the block diagram of booting time operation.
Figure 6-1
The iROM code is placed in internal 64KB ROM. It initializes basic system functions such as clock, stack, and
heap.
The iROM loads the first boot loader image from a specific booting device to internal 96KB SRAM. The
booting device is selected by Operating Mode (OM) pins. According to the secure boot key values, the iROM
code may do an integrity check on the first boot loader image.
The first boot loader loads the second boot loader then may check the integrity of the second boot loader
according the secure boot key values.
The second boot loader initializes system clock, UART, and DRAM controller. After initializing DRAM
controller, it loads OS image from the booting device to DRAM. According to the secure boot key values, the
second boot loader can do an integrity check on the OS image.
After the booting completes, the second boot loader jumps to the operating system.
The iROM code reads the OM pins to find the booting device. The OM register provides the OM pin and other
information required for booting. For more information on OM register, refer to Chapter 02.01, "Chip ID".
The OM pin decides the booting devices such as OneNAND, NAND, MoviNAND, eSSD and iNAND. It also
decides the device options such as bit width, wait cycles, page sizes, and ECC modes.
NOTE: USB booting is provided for system debugging and flash reprogramming, not for normal booting. Hence, it is
selected by toggling OM[5:4] pin to "2'b10" without considering other OM pin values.
The iROM code in internal 64KB ROM is named BL0. And the first boot loader is named BL1
Figure 6-1
Block Diagram of Booting Time Operation
6 BOOTING SEQUENCE
6-2

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