S5PC110_UM
6
BOOTING SEQUENCE
6.1 OVERVIEW OF BOOTING SEQUENCE
S5PC110 consists of 64KB ROM and 96KB SRAM as internal memory. For booting, internal 64KB ROM and
internal 96KB SRAM regions can be used. S5PC110 boots from internal ROM to enable secure booting, which
ensures that the image cannot be altered by unauthorized users. To select secure booting or normal booting,
S5PC110 should use e-fuse information. This information cannot be altered after being programmed.
The booting device can be chosen from following list:
•
General NAND Flash memory
•
OneNAND memory
•
SD/ MMC memory (such as MoviNAND and iNAND)
•
eMMC memory
•
eSSD memory
•
UART and USB devices
At system reset, the program counter starts from the iROM codes in internal ROM region. However, the system
reset may be asserted not only on booting time, but also on wakeup from low power modes. Therefore, the iROM
code must execute appropriate process according to the reset status (refer to
The boot loader is largely composed of iROM, first and second boot loaders. The characteristics of these boot
loaders are:
•
iROM code: Contains small and simple code, which is platform-independent and stored in internal memory
•
First boot loader: Contains small and simple code, which is platform-independent and stored in external
memory device. Related to secure booting.
•
Second boot loader: Contains complex code, which is platform-specific and stored in external memory device.
If you select secure booting, iROM code and first boot loader provide integrity checking function (that is it uses
public key algorithm) to verify loaded image. There are 160 e-fuse bits of secure boot key, and they are used to
authenticate loaded public key before the iROM's integrity check. For more information on secure booting, refer to
Chapter.
6 BOOTING SEQUENCE
Table
6-1).
6-1