S5PC110_UM
4.10.3 RESET CONTROL REGISTER
4.10.3.1 Reset Control Register (RST_STAT, R/W, Address = 0xE010_A000)
RST_STAT
Reserved
DIDLE_WAKEUP
DSTOP_WAKEUP
Reserved
SLEEP_WAKEUP
Reserved
SWRESET
nWDTRESET
nWRESET
nRESET
Bit
[31:20]
Reserved
[19]
ARM reset from DEEP-IDLE
[18]
ARM reset from DEEP-STOP
[17]
Reserved
[16]
Reset by SLEEP mode wake-up
[15:4]
Reserved
[3]
Software reset by SWRESET
[2]
Watch dog timer reset by WDTRST
[1]
Warm reset by XnWRESET
[0]
External reset by XnRESET
Description
4 POWER MANAGEMENT
Initial State
0x000
0
0
0
0
0x000
0
0
0
1
4-41