Nand Flash Interface And 1 / 4-Bit Ecc Registers - Samsung S5PC110 Manual

S5PC110_UM

4.5.2 NAND FLASH INTERFACE AND 1 / 4-BIT ECC REGISTERS

4.5.2.1 Nand Flash Configuration Register (NFCONF, R/W, Address = 0xB0E0_0000)
NFCONF
Reserved [31:26]
MsgLength [25]
ECCType0 [24:23]
Reserved [22:16]
TACLS [15:12]
TWRPH0 [11:8]
TWRPH1 [7:4]
MLCFlash
PageSize
AddrCycle
Reserved
Bit
Reserved
0 = 512 byte Message Length
1 = 24 byte Message Length
This bit indicates the kind of ECC to use.
00 = 1-bit ECC
10 = 4-bit ECC
01 = 11 = Disable 1-bit and 4-bit ECC
Reserved
CLE and ALE duration setting value (0~15)
Duration = HCLK x TACLS
TWRPH0 duration setting value (0~15)
Duration = HCLK x ( TWRPH0 + 1 )
Note: You should add additional cycles about 10ns for page read
because of additional signal delay on PCB pattern.
TWRPH1 duration setting value (0~15)
Duration = HCLK x ( TWRPH1 + 1 )
[3] This bit indicates the kind of NAND Flash memory to use.
0 = SLC NAND Flash
1 = MLC NAND Flash
[2] This bit indicates the page size of NAND Flash Memory,
When MLCFlash is 0, the value of PageSize is as follows:
0 = 2048 Bytes/page
1 = 512 Bytes/page
When MLCFlash is 1, the value of PageSize is as follows:
0 = 4096 Bytes/page
1 = 2048 Bytes/page
[1] This bit indicates the number of Address cycle of NAND Flash
memory.
When Page Size is 512 Bytes,
0 = 3 address cycle
1 = 4 address cycle
When page size is 2K or 4K,
0 = 4 address cycle
1 = 5 address cycle
[0] Reserved
Description
4 NAND FLASH CONTROLLER
Initial State
0
0
0
0000000
0x1
0x0
0x0
0
0
0
0
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