Samsung S5PC110 Manual page 821

S5PC110_UM
UFCONn Bit
Reserved
Tx FIFO Reset
Rx FIFO Reset
FIFO Enable
NOTE: If the UART does not reach the FIFO trigger level and does not receive data during 3 word time in DMA receive mode
with FIFO, the Rx interrupt will be generated (receive time out). You must check the FIFO status and read out the rest
[Channel 2, 3]
000 = 2 byte
010 = 6 bytes
100 = 10 bytes
110 = 14 bytes
[3] -
[2] Auto-clears after resetting FIFO
0 = Normal
1 = Tx FIFO reset
[1] Auto-clears after resetting FIFO
0 = Normal
1 = Rx FIFO reset
[0] 0 = Disables
1 = Enables
1 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
Description
001 = 4 bytes
011 = 8 bytes
101 = 12 bytes
111 = 16 bytes
Initial State
0
0
0
0
1-19