Samsung S5PC110 Manual page 940

S5PC110_UM
5.8.6.5 Host Channel-n Transfer Size Register (HCTSIZn, R/W, Address = 0xEC00_0510+n*20h)
Channel_number: 0 ≤ n ≤ 15
HCTSIZn Bit
DoPng [31]
Pid [30:29]
PktCnt [28:19]
XferSize [18:0]
NOTE: Transfer Size for a Host Channel must equal [Packet Count * Max Packet Size] for accurate data transfer.
5.8.6.6 Host Channel-n DMA Address Register (HCDMAn, R/W, Address = 0xEC00_0514+n*20h)
Channel_number: 0 ≤ n ≤ 15
This register is used by the OTG host in the internal DMA mode to maintain the buffer pointer for IN/ OUT
transactions.
HCDMAn Bit
DMAAddr [31:0]
Do Ping
Setting this field to 1 directs the host to do PING protocol.
PID
The application programs this field with the type of PID to
use for the initial transaction. The host maintains this field for
the rest of the transfer.
2'b00: DATA0
•
2'b01: DATA1
•
2'b10: DATA2
•
2'b11: MDATA (non-control)/ SETUP(control)
•
Packet Count
This field is programmed by the application with the expected
number of packets to be transmitted (OUT) or received (IN).
The host decrements this count on every successful
transmission or reception of an OUT/ IN packet. Once this
count reaches zero, the application is interrupted to indicate
normal completion.
Transfer Size
For an OUT, this field is the number of data bytes the host
sends during the transfer.
For an IN, this field is the buffer size that the application has
reserved for the transfer. The application is expected to
program this field as an integer multiple of the maximum
packet size for IN transactions.
DMA Address
This field holds the start address in the external memory
from which the data for the endpoint must be fetched or to
which it must be stored. This register is incremented on
every AHB transaction.
Description
Description
5 USB2.0 HS OTG
R/W Initial State
R/W 1'h0
R/W 2'b0
R/W 10'b0
R/W 19'b0
R/W Initial State
R/W 32'h0
5-64