Etb; About The Etb - Samsung S5PC110 Manual

S5PC110_UM

2.3 ETB

2.3.1 ABOUT THE ETB

The ETB provides on-chip storage of trace data using 32-bit RAM.
ETB accepts trace data from CoreSight trace source components through an AMBA Trace Bus (ATB).
The ETB contains the following blocks:
• Formatter - Inserts source ID signals into the data packet stream so that trace data can be re-associated with
its trace source after the data is read back out of the ETB.
• Control - Control registers for trace capture and flushing.
• APB interface - Read, write, and data pointers provide access to ETB registers. In addition, the APB interface
supports wait states through the use of a PREADYDBG signal output by the ETB. The APB interface is
synchronous to the ATB domain.
• Register bank - Contains the management, control, and status registers for triggers, flushing behavior, and
external control.
• Trace RAM interface - Controls reads and writes to the Trace RAM.
• Memory BIST interface - Provides test access to the Trace RAM.
Figure 2-5 ETB Block Diagram ECT (CTI + CTM)
shows the main ETB blocks. The
Figure 2-5
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