Samsung S5PC110 Manual page 355

S5PC110_UM
3.7.10.4 IEM Control SFRs (DCGPERF_MAP0, R/W, Address = 0xE010_3020)
DCGPERF_MAP0
DCGPERF_MAP0
3.7.10.5 IEM Control SFRs (DCGPERF_MAP1, R/W, Address = 0xE010_3024)
DCGPERF_MAP1
DCGPERF_MAP1
DCGPERF_MAP0~1 are mapped to IECCFGDCGPERFMAP[63:0] of IEM_IEC input port.
3.7.10.6 IEM Control SFRs (DVCIDX_MAP_MAP0, R/W, Address = 0xE010_3040)
DVCIDX_MAP
Reserved
DCGPERF_MAP0
DVCIDX_MAP is mapped to IECCFGDVCIDXMAP[23:0] of IEM_IEC input port.
Bit
[31:0] DCG performance map[31:0]
Bit
[31:0] DCG performance map[63:32]
Bit
[31:24] Reserved
[23:0] IEC configuration for DVC index map[23:0]
Description
Description
Description
3 CLOCK CONTROLLER
Initial State
0xFFFF_FFFF
Initial State
0xFFFF_FFFF
Initial State
0x00
0xFF_FFFF
3-58