Ac And Dc Logic Input Levels For Differential Signals; Differential Signals Definition; Differential Swing Requirement For Clock (Ck - Ck) And Strobe (Dqs - Dqs) - Samsung M391B5273DH0 Hardware User Manual

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11.3 AC and DC Logic Input Levels for Differential Signals

11.3.1 Differential Signals Definition

11.3.2 Differential Swing Requirement for Clock (CK - CK) and Strobe (DQS - DQS)

Symbol
Parameter
V
differential input high
IHdiff
V
differential input low
ILdiff
V
(AC)
differential input high ac
IHdiff
V
(AC)
differential input low ac
ILdiff
NOTE :
1. Used to define a differential signal slew-rate.
2. for CK - CK use V
/V
(AC) of ADD/CMD and V
IH
IL
then the reduced level applies also here.
3. These values are not defined, however they single-ended signals CK, CK, DQS, DQS need to be within the respective limits (V
nals as well as the limitations for overshoot and undershoot. Refer to "overshoot and Undersheet Specification"
datasheet
V
.DIFF.AC.MIN
IH
V
.DIFF.MIN
IH
0.0
V
.DIFF.MAX
IL
V
.DIFF.AC.MAX
IL
Figure 3. Definition of differential ac-swing and "time above ac level" tDVAC
1.35V
min
+0.18
NOTE 3
2 x (V
(AC) - V
)
IH
REF
2 x (V
NOTE 3
; for DQS - DQS use V
REFCA
IH
tDVAC
half cycle
DDR3-800/1066/1333/1600
max
min
NOTE 3
+0.20
-0.18
NOTE 3
2 x (V
(AC) - V
NOTE 3
IH
(AC) - V
)
NOTE 3
IL
REF
/V
(AC) of DQs and V
; if a reduced ac-high or ac-low level is used for a signal group,
IL
REFDQ
- 15 -
DDR3L SDRAM
tDVAC
time
1.5V
max
NOTE 3
-0.20
)
NOTE 3
REF
2 x (V
(AC) - V
)
IL
REF
(DC) max, V
(DC)min) for single-ended sig-
IH
IL
Rev. 1.0
unit
NOTE
V
1
V
1
V
2
V
2

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