Address Mapping - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM
15. Wait for minimum 400ns.
16. Issue a PALL command using the DirectCmd register.
17. Issue an EMRS2 command using the DirectCmd register to program the operating parameters.
18. Issue an EMRS3 command using the DirectCmd register to program the operating parameters.
19. Issue an EMRS command using the DirectCmd register to enable the memory DLLs.
20. Issue a MRS command using the DirectCmd register to reset the memory DLL.
21. Issue a PALL command using the DirectCmd register.
22. Issue two Auto Refresh commands using the DirectCmd register.
23. Issue a MRS command using the DirectCmd register to program the operating parameters without resetting
the memory DLL.
24. Wait for minimum 200 clock cycles.
25. Issue an EMRS command using the DirectCmd register to program the operating parameters. If OCD
calibration is not used, issue an EMRS command to set OCD Calibration Default. After that, issue an EMRS
command to exit OCD Calibration Mode and to program the operating parameters.
26. If there are two external memory chips, perform steps 14~25 for chip1 memory device.
27. Set the ConControl to turn on an auto refresh counter. 28. If power down modes is required, set the
MemControl registers.

1.2.2 ADDRESS MAPPING

The controller modifies the address of the bus transaction coming from the AXI slave port into a memory address -
chip select, bank address, row address, column address and memory data width.
To map chip select0 of the memory device to a specific area of the address map, the chip_base and chip_mask
bit-fields of the MemConfig0 register must be set (Refer to Register Descriptions). If chip1 of the memory device
exists, the MemConfig1 register must also be set.
Then, the AXI address requested by the AXI Master is divided into AXI base address and AXI offset address.
The AXI base address activates the appropriate memory chip select and the AXI offset address is mapped to a
memory address according to the bank, row, column number, and data width set by the MemConfig register.
There are two ways to map the AXI offset address as shown in
mapping.
Linear mapping and Interleaved
Figure 1-2
1 DRAM CONTROLLER
1-6

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