Samsung S5PC110 Manual page 406

S5PC110_UM
4.10.4.7 Power Management Register (STOP_CFG, R/W, Address = 0xE010_C030)
STOP_CFG
TOP_LOGIC
TOP_MEMORY
ARM_L2CACHE
ARM_LOGIC
Reserved
OSCUSB_EN
OSC_EN
Bit
[31:30] Configure TOP logic state
01 = Retention
10 = ON
Other: Reserved. Writing reserved values to registers can lead
to unexpected behavior.
When ARM_LOGIC is set to 2'b10 (STOP mode), this field
should be 2'b10.
[29:28] Configure TOP memory state (DO NOT CHANGE)
01 = OFF/ Retention (According to STOP_MFM_CFG)
Other: Reserved
[27:26] Configure ARM L2 cache state in STOP mode. When
ARM_LOGIC is ON, L2CACHE is always ON regardless of this
field setting.
00 = OFF
01 = Retention
Other: Reserved
[25:24] Configure ARM logic state in STOP/D-STOP mode
00 = OFF (D-STOP mode)
10 = ON (STOP mode)
Other: Reserved
[23:2] Reserved
[1] Control USB X-tal Oscillator pad in STOP mode
(0: disable, 1: enable)
[0] Control X-tal Oscillator pad in STOP mode
(0: disable, 1: enable)
Description
4 POWER MANAGEMENT
Initial State
0x2
0x1
0x1
0x2
0x00_0000
0
0
4-46