Samsung S5PC110 Manual page 717

S5PC110_UM
Register Address
DA_7 0xE090_04E4
Channel Control Registers. For more information, refer to page 3-30 of "PL330 TRM".
CC_0 0xE090_0408
CC_1 0xE090_0428
CC_2 0xE090_0448
CC_3 0xE090_0468
CC_4 0xE090_0488
CC_5 0xE090_04A8
CC_6 0xE090_04C8
CC_7 0xE090_04E8
Loop Counter 0 Registers. For more information, refer to page 3-35 of "PL330 TRM".
LC0_0 0xE090_040C
LC0_1 0xE090_042C
LC0_2 0xE090_044C
LC0_3 0xE090_046C
LC0_4 0xE090_048C
LC0_5 0xE090_04AC
LC0_6 0xE090_04CC
LC0_7 0xE090_04EC
Loop Counter 1 Registers. For more information, refer to page 3-36 of "PL330 TRM".
LC1_0 0xE090_0410
LC1_1 0xE090_0430
LC1_2 0xE090_0450
LC1_3 0xE090_0470
LC1_4 0xE090_0490
LC1_5 0xE090_04B0
LC1_6 0xE090_04D0
LC1_7 0xE090_04F0
Reserved 0xE090_0414-
0xE090_041C
Reserved 0xE090_0434-
0xE090_043C
Reserved 0xE090_0454-
0xE090_045C
Reserved 0xE090_0474-
0xE090_047C
Reserved 0xE090_0494-
0xE090_049C
R/W
R Specifies the Destination Address for DMA Channel
7.
R Specifies the Channel Control for DMA Channel 0.
R Specifies the Channel Control for DMA Channel 1.
R Specifies the Channel Control for DMA Channel 2.
R Specifies the Channel Control for DMA Channel 3.
R Specifies the Channel Control for DMA Channel 4.
R Specifies the Channel Control for DMA Channel 5.
R Specifies the Channel Control for DMA Channel 6.
R Specifies the Channel Control for DMA Channel 7.
R Specifies the Loop Counter 0 for DMA Channel 0.
R Specifies the Loop Counter 0 for DMA Channel 1.
R Specifies the Loop Counter 0 for DMA Channel 2.
R Specifies the Loop Counter 0 for DMA Channel 3.
R Specifies the Loop Counter 0 for DMA Channel 4.
R Specifies the Loop Counter 0 for DMA Channel 5.
R Specifies the Loop Counter 0 for DMA Channel 6.
R Specifies the Loop Counter 0 for DMA Channel 7.
R Specifies the Loop Counter 1 for DMA Channel 0.
R Specifies the Loop Counter 1 for DMA Channel 1.
R Specifies the Loop Counter 1 for DMA Channel 2.
R Specifies the Loop Counter 1 for DMA Channel 3.
R Specifies the Loop Counter 1 for DMA Channel 4.
R Specifies the Loop Counter 1 for DMA Channel 5.
R Specifies the Loop Counter 1 for DMA Channel 6.
R Specifies the Loop Counter 1 for DMA Channel 7.
- Reserved
- Reserved
- Reserved
- Reserved
- Reserved
Description
1 DMA CONTROLLER
Reset Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
-
-
-
-
-
1-11