Samsung S5PC110 Manual page 959

Risc microprocessor
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S5PC110_UM
DIEPCTLn/
Bit
DOEPCTLn
NAKsts
[17]
DPID
[16]
EO_FrNum
USBActEP
[15]
2'b01: Isochronous
2'b10: Bulk
2'b11: Interrupt
NAK Status
Applies to IN and OUT endpoints.
Indicates the following:
1'b0: The core is transmitting non-NAK handshakes based on
the FIFO status.
1'b1: The core is transmitting NAK handshakes on this endpoint.
When either the application or the core sets this bit:
The core stops receiving any data on an OUT endpoint, even if
there is space in the RxFIFO to accommodate the incoming
packet.
For non-isochronous IN endpoints: The core stops transmitting
any data on an IN endpoint, even if there data is available in the
TxFIFO.
For isochronous IN endpoints: The core sends out a zero-length
data packet, even if there data is available in the TxFIFO.
Irrespective of this bit's setting, the core always responds to
SETUP data packets with an ACK handshake.
Endpoint Data PID
Applies to interrupt/bulk IN and OUT endpoints only. Contains the
PID of the packet to be received or transmitted on this endpoint.
The application must program the PID of the first packet to be
received or transmitted on this endpoint, after the endpoint is
activated. The applications use the SetD1PID and SetD0PID
fields of this register to program either DATA0 or DATA1 PID.
1'b0: DATA0
1'b1: DATA1 This field is applicable both for Scatter/Gather
DMA mode and non- Scatter/Gather DMA mode.
Even/ Odd (Micro) Frame
In non-Scatter/Gather DMA mode: Applies to isochronous IN and
OUT endpoints only. Indicates the (micro) frame number in which
the core transmits/receives isochronous data for this endpoint.
The application must program the even/odd (micro) frame number
in which it intends to transmit/receive isochronous data for this
endpoint using the SetEvnFr and SetOddFr fields in this register.
1'b0: Even (micro) frame
1'b1: Odd (micro) frame When Scatter/Gather DMA mode is
enabled, this field is reserved. The frame number in which to send
data is provided in the transmit descriptor structure. The frame in
which data is received is updated in receive descriptor structure.
USB Active Endpoint
Applies to IN and OUT endpoints.
Indicates whether this endpoint is active in the current
configuration and interface. The core clears this bit for all
endpoints after detecting a USB reset. After receiving the
Description
5 USB2.0 HS OTG
R/W
Initial State
R
1'b0
R
1'b0
R_W_
1'b0
SC
5-83

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