Usage Model; Counter Setting; Interrupt; Count Value Update - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.6 USAGE MODEL

Follow the restrictions given below:
TCLKB must be equal to or slower than PCLK.
Set the count value as high as possible (To improve resolution).
TCFG and tick interval must not be changed at run-time. If you want to change them, stop timers, do TICK
SW reset (TCFG[16]) in advance and then change. TICK SW reset all logic in TICK generation region and
TICNTO SFR.

2.6.1 COUNTER SETTING

1. TICNTB, and TFCNTB: refer Chapter 5,"TICK GENERATION"
2. ICNTB: Interrupt Counter Value = ICNTB+1.

2.6.2 INTERRUPT

There are five kinds of interrupt sources in system timer. The first one is interrupt counter expired, and the other
four are SFR write status.
When you write a value to TCON, TICNTB, TFCNTB, and ICNTB SFR, the value may not be immediately updated
to system timer's internal counter, because sometimes the system timer uses RTC or XXTI clock for counter.
These clocks are slower than PCLK, the operating clock of SFR. After the write status interrupts are asserted, the
software can check whether the new value is really updated at the internal counter. SW must wait until that time.
If you do not want to assert an interrupt, continuously read INT_CSTAT (polling method) to know update timing. In
that case, you can selectively enable or disable each source of interrupt. For more information, refer
INT_CSTAT[10:6] and INT_CSTAT[0].

2.6.3 COUNT VALUE UPDATE

When TFCNTB or TICNTB write interrupt are asserted after writing the counter value to TICNTB or TFCNTB, tick
timer counter is updated.
Interrupt manual update (TCON[4] or ICNTB[31]) updates the interrupt timer at that time. As described in
, after write status interrupt occurs, you can check whether internal counter is really updated.
2.6.2
The Interrupt Interval mode (TCON[5]) allows interrupt timer to update value in ICNTB automatically, after interrupt
timer counter is expired.
2 SYSTEM TIMER
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2-6

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