Table 4-2 S5Pc110 Power Domains Of Internal Logic - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM
Power "OFF" means that the power to S5PC110 is externally "OFF" using regulator or Power Management IC
(PMIC). In S5PC110, SYSCON generates power control signal to regulator or PMIC. When power "OFF" is
applied, the states of normal F/Fs and retention F/Fs are lost. Therefore, if you want to save some important data,
you should move the data to external memory and restore it when wakeup event occurs.
To reduce the dynamic power consumption, S5PC110 uses clock gating and frequency scaling. Clocks in
S5PC110 can be disabled in module-by-module basis. Clock frequency can be lowered when the system is not
required to operate at the maximum frequency.
To reduce power consumption further in the system level, S5PC110 makes the DRAM enter into self-refresh
mode and deep power-down mode (refer to Chapter 5.1, "DRAM Controller").
To reduce the static current, S5PC110 supports block-based power gating. In specific applications, a certain
group of modules are not required to run, and therefore do not need to be powered "ON". For example, MP3
playback, Multi-Format Codec (MFC), Video modules (Camera interface, JPEG, Video processor, Mixer, and so
on), and 3D graphics core, do not need to operate and can be power-gated for minimum static power
consumption. S5PC110 internal modules are grouped into 11 power domains based on their functions, as shown
in
S5PC110 Power Domains of Internal Logic and eight power domains except System Timer, ALIVE
Table 4-2
and RTC can be power-gated by turning "OFF" the Current Cut-off Switch (CCS), which connects the current path
between real VDD and virtual VDD.
Power Domain
1
CPU
2
MFC
3
G3D
4
Audio Sub-system
5
LCD
6
TV
7
CAM
8
System Timer
9
TOP
10
ALIVE
11
RTC
Table 4-2
S5PC110 Power Domains of Internal Logic
Cortex-A8, L1/L2 Cache, ETM, NEON
MFC
G3D
Audio related modules: I2S channel 0 only, Audio buffer
RAM
LCD controller, DSIM, G2D
VP, MIXER, TV Encoder, HDMI
Camera, CSIS, JPEG, Rotator
System Timer
Clock Management Unit, GPIO (OFF), Bus components,
VIC, TZIC, Internal memory (IROM and IRAM), NAND
controller, OneNAND controller, CF controller, SRAM
controller, Peripheral DMA, Memory DMA, CoreSight,
Secure JTAG, Modem interface, Security sub-system,
TSI, HSMMC, USB HOST, USB OTG, DRAM controller,
CHIPID, IEM_IEC, Security key, SPDIF, PCM, SPI,
KEYIF, TSADC, I2C, I2S channel 1 and 2, AC97, PCM,
System timer, Watchdog timer, UART
Power Management Unit, GPIO (ALIVE), Wakeup logic
RTC
Included Modules
4 POWER MANAGEMENT
Power Gating
Methods
PMOS (inside CPU)
PMOS (header)
PMOS (header)
PMOS (header)
PMOS (header)
PMOS (header)
PMOS (header)
PMOS but, switch is
not off (always on)
PMOS (header)
NO
NO
4-3

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