Port Group Etc1 Control Register - Samsung S5PC110 Manual

Risc microprocessor
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S5PC110_UM

2.2.51 PORT GROUP ETC1 CONTROL REGISTER

There are two control registers, namely, ETC1PUD and ETC1DRV.
ETC1 ports are dedicated as shown in table below:
ETC1
ETC1[0]
ETC1[1]
ETC1[2]
ETC1[3]
ETC1[4]
ETC1[5]
ETC1[6]
XDDR2_SEL
ETC1[7]
XPWRRGTON
2.2.51.1 Port Group ETC1 Control Register (ETC1PUD, R/W, Address = 0xE020_0628)
ETC1PUD
ETC1PUD[n]
ETC1PUD[6]
ETC1PUD[7]
Pin Name
XOM[0]
Operating Mode control signal 0
XOM[1]
Operating Mode control signal 1
XOM[2]
Operating Mode control signal 2
XOM[3]
Operating Mode control signal 3
XOM[4]
Operating Mode control signal 4
XOM[5]
Operating Mode control signal 5
Selection DDR type (LPDDR1/2 or DDR2)
Power Regulator enable
Bit
[2n+1:2n]
Reserved(fixed)
ETC1PUD[0] : Disable
n=0~5
ETC1PUD[1] : Disable
ETC1PUD[2] : Disable
ETC1PUD[3] : Disable
ETC1PUD[4] : Disable
ETC1PUD[5] : Disable
[13:12]
00 = Pull-up/ down disabled
01 = Pull-down enabled
10 = Pull-up enabled
11 = Reserved
[15:14]
Reserved (fixed)
ETC1PUD[7] : Disable
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Description
Initial State
0
0
0
0
0
0
0
0
Initial State
0x000
0x0
0x0
2-120

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