Samsung S5PC110 Manual page 202

Risc microprocessor
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S5PC110_UM
2.2.55.23 GPIO Interrupt Control Registers (GPA0_INT_FLTCON0, R/W, Address = 0xE020_0800)
GPA0_INT_FLTCON0
FLTEN1[3]
FLTWIDTH1[3]
FLTEN1[2]
FLTWIDTH1[2]
FLTEN1[1]
FLTWIDTH1[1]
FLTEN1[0]
FLTWIDTH1[0]
Bit
[31]
Filter Enable for GPA0_INT[3]
0 = Disables
1 = Enables
[30:24]
Filtering width of GPA0_INT[3]
This value is valid when FLTSEL1is 1.
[23]
Filter Enable for GPA0_INT[2]
0 = Disables
1 = Enables
[22:16]
Filtering width of GPA0_INT[2]
This value is valid when FLTSEL1is 1.
[15]
Filter Enable for GPA0_INT[1]
0 = Disables
1 = Enables
[14:8]
Filtering width of GPA0_INT[1]
This value is valid when FLTSEL1is 1.
[7]
Filter Enable for GPA0_INT[0]
0 = Disables
1 = Enables
[6:0]
Filtering width of GPA0_INT[0]
This value is valid when FLTSEL1is 1.
2 GENERAL PURPOSE INPUT/ OUTPUT
Description
Initial State
0
0
0
0
0
0
0
0
2-167

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