Ack Signal Transmission - Samsung S5PC110 Manual

S5PC110_UM

2.3.3 ACK SIGNAL TRANSMISSION

To complete a one-byte transfer operation, the receiver sends an ACK bit to the transmitter. The ACK pulse
occurs at the ninth clock of the SCL line. Eight clocks are required for the one-byte data transfer. The master
generates clock pulse required to transmit the ACK bit.
The transmitter sets the SDA line to High to release the SDA line if the ACK clock pulse is received. The receiver
drives the SDA line Low during the ACK clock pulse so that the SDA keeps Low during the High period of the
ninth SCL pulse. The software (I2CSTAT) enables or disables ACK bit transmit function. However, the ACK pulse
on the ninth clock of SCL is required to complete the one-byte data transfer operation.
Data Output by
Transmitter
Data Output by
Receiver
SCL from
Master
Condition
1
S
Start
Figure 2-5
2
Acknowledge on the I2C-Bus
2 IIC-BUS INTERFACE
Clock to Output
7 8 9
Clock Pulse for Acknowledgment
2-5